Stacking semiconductor transistors could aid in overcoming Moore’s law
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As semiconductor manufacturers make their products smaller, they encounter limitations on the computing power that can be integrated into a single chip. A groundbreaking chip may offer a solution to this dilemma and advance the creation of sustainable electronics.
Since the 1960s, enhancing electronic capabilities has revolved around miniaturizing their fundamental components, transistors, and packing them more densely onto chips. This trend was encapsulated by Moore’s Law, which posited that the number of components on a microchip doubles every year. However, this phenomenon began to falter around 2010. Li Xiaohan and colleagues at Saudi Arabia’s King Abdullah University of Science and Technology have suggested that the answer to this challenge might be to build upwards instead of inwards.
They engineered a chip featuring 41 vertical layers of two distinct semiconductor types, separated by insulating material. This stack of transistors is approximately ten times taller than any previously created. To evaluate its efficiency, the team produced 600 duplicates, all demonstrating consistent performance. Some of these stacked chips were utilized to execute various fundamental operations required by computers or sensing devices, showing performance levels comparable to traditional non-stacked counterparts.
Li mentions that producing these stacks necessitates a manufacturing method that requires less energy compared to standard chip production. Team members, including Thomas Anthopoulos from the University of Manchester in the UK indicates that while the new chip may not lead to advanced supercomputers, its application in everyday devices like smart home gadgets and wearable health monitors could significantly lower the carbon footprint of the electronics industry while enhancing functionality with each additional layer.
How high will the stack rise? “The possibilities are endless; we can keep pushing the limits. It’s just a journey of determination,” Anthopoulos states.
However, he notes that engineering hurdles persist regarding the temperature tolerance of the chip before it fails. Muhammad Alam from Purdue University in Indiana comments that it’s analogous to trying to keep cool by layering on multiple hoodies; each additional layer raises the heat. Alam asserts that the chip’s current thermal threshold of 50 degrees Celsius would need to rise by over 30 degrees Celsius to become practical for real-world application. Nonetheless, he believes that for electronics to progress in the near future, pursuing vertical growth is the only viable strategy.
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Source: www.newscientist.com
